down conversion中文是什么意思

• 降频转换
• 下变换

• down     down3 n. 1.(装被、褥等用的)鸭绒 ...
• conversion    n. 1.变换，转化，转换；换算，换位。 2.(意见、信 ...
• parametric down-conversion    参量下转换
• a conversion    a转换
• conversion    n. 1.变换，转化，转换；换算，换位。 2.(意见、信仰等的)改变〔特指改信基督教〕；(车身，设备等的)改装，改造。 3.【法律】变更；强占；【数学】换算法；【逻辑学】换位(法)；【心理学】(心理冲突转化为生理病态的)变形表现，变形发泄;【军事】改换装备；改装；【商业】兑换；更换(字据等)。 4.【橄榄球】触地得分，(篮球)罚球得分。
• and down    你是否低落
• be down    下楼来, 生病
• be down for    被列入名单
• be down on    对...有怨气
• be down with    患 ...病
• down for    列入（学校、比赛等的）名单
• down on    瞧不起；歧视；对…有偏见
• down there    去那里
• down to    降至; 下至; 由大到小; 直到……
• down with    打倒, 把...拿下; 打倒；把…拿下
• is down    某某某倒地（死了！）
• no down    无人出局
• down down    出局
• a law conversion    律转换
• addre conversion    地址转换
• address conversion    地址转换
• adiabatic conversion    绝热转化
• aircraft conversion    飞机改型
• alkyne conversion    炔的转化

• One is the digital down conversion . the method of look - table is described in detail
  其一是数字下变频算法，重点说明了其中的查表法及其推广。
• The receiver used two stages of down conversion . the total gain of receiver is more than 43db
  接收支路采用超外差两次下变频的方式,实验表明接收支路的总增益大于43db 。
• Unlike the monostatic sar , two independent local oscillators are used for up / down conversion in bistatic case , so low frequency components of phase noise cannot be cancelled
  双基地sar用两个独立的本振分别实现上变频和下变频,相噪低频分量不能相互抵消,形成与单基地sar不同的低频相噪。
• This dissertation focuses on the carrier recovery in high dynamic navigation receiver , the effect of iq mismatch in direct down conversion receiver and the signal to noise ratio estimator in navigation receiver
  本文以二代卫星导航定位系统为应用背景,着重研究了接收机中的载波恢复技术、 iq非正交对伪码和载波影响的模型、载噪比估计技术。
• Transmit / receive ( t / r ) modules is the base of the modern radar . the paper puts forth a design scheme according to the target including t / r switch , up conversion , power amplified , low noise receive and down conversion . the dimension is restricted to 106 89mm through scheme comparison and the existing experiment condition , the final products arrive at the target we expect with millimeter hybrid integrated circuit
  收发t / r组件在当今雷达系统中占有举足轻重的地位,本文根据设计指标提出了毫米波前端的设计方案,系统功能上要求完成收发双工、上变频和功率放大、低噪声放大和下变频功能,外形尺寸为106 89mm ,通过综合方案比较,结合自身条件,选取了毫米波混合集成电路形式。
• And the performance of these algorithms is compared with each other . to simplify the sampling rate design and digital processing in receiver , we prefer to use the direct down conversion structure . the problem is the analog front - end in this structure will bring iq mismatch , which will effect the phase of recovered carrier and code
  第三部分对接收机中的载噪比估计算法进行了分析,目前gps导航接收机中采用的载噪比估计算法对残余多普勒非常敏感,而且gps中的数据速率为50bps ,北斗二代中的存在数据速率为500bps ,应用条件的差异导致该算法的不可用。
• Secondly , basing on single channel if sr receiver mathematic model , this thesis has designed if sr receiver subsystem and brought forward its design project and system circuit principle diagram , and explained the system working principle . furthermore , this thesis introduces the working principles and respective applications of wideband high - speed adc ad6640 , ddc ad6620 and high - speed dsp tms320c6713 according with the if sr receiver subsystem high - speed analog digital conversion department , digital down conversion department and high speed digital signal processing department . thirdly , the thesis emphatically demonstrates the software realization department of the if sr receiver subsystem , which including ad6620 ' s inner parameter software setup , tms320c6713 data transmission and processing and the quadrant demodulation algorithm program realization
  其次，基于单通道中频软件无线电接收机数学模型，本文设计了中频( if ， intermediatefrequency )软件无线电接收机子系统，给出了中频软件无线电接收机子系统的设计方案和系统电路原理图，说明了系统工作原理，并分别对应系统中的高速模数转换部分、数字下变频部分、基带数字硕士学位论文软件无线电理论研究及中频软件无线电接收机子系统设计信号处理部分，介绍了高速adcad664o ，数字下变频器( ddc ， digitaldownconverter ) ad6620 ，高速数字信号处理器( dsp ， digitalsignalproeessor ) tms320c6713的工作原理，以及它们在中频软件无线电接收机子系统中的应用。
• The radar digitalized receiver is based on digital down conversion ( ddc ) technology , which is implemented on fpga . the radar controller is based on the following technologies : fpga , tigersharc dsp and can bus . the implementation of ddc includes two parts , the demodulation and decimation of i and q channels
  雷达数字化接收机部分是基于数字下变频( ddc )技术在fpga上实现的算法研究及工程实现;雷达控制器部分是基于tigersharc 、 fpga 、 can总线的多项控制技术的方法研究及实现。